Mixed-Signal, RF, and Microwave Seminar

Scaling of CMOS technology is no longer beneficial for energy reduction as it was in the past. To mitigate process variations and leakage, voltage scaling has slowed down. At the same time, increasing application diversity and increasing complexity require great amounts of flexibility in digital hardware within constrained energy. These changes in process technology and applications are now placing new emphasis on design. Custom chips are becoming too costly, programmable chips overrun energy budget. This talk will therefore present a solution to this problem. Radix factorization algorithms will be applied at varying levels of complexity. To gain insight into chip-level ideas, FFT factorization will be shown to achieve record energy and area efficiency. These insights will carry over to chip-level interconnect architecture and show that flexibility and efficiency can exist in the same chip. New technologies that scale better than CMOS in supporting architectural features will be explored. Bio: Dejan Marković is an Assistant Professor of Electrical Engineering at the University