Joint IQIM/AWS Seminar Series

Abstract: Quantum error correction offers a path to algorithmically-relevant error rates by encoding logical qubits within many physical qubits, where increasing the number of physical qubits enhances protection against physical errors. However, introducing more qubits also increases the number of error sources, so the density of errors must be sufficiently low in order for logical performance to improve with increasing code size. In this talk, we report the measurement of logical qubit performance on distance-3 and distance-5 surface codes on a Sycamore superconducting processor, and demonstrate that our code has sufficient performance to overcome the additional errors from increasing qubit number.

***Please note different locations for the April 26 Seminar. The talk will be held in the Beckman Institute Auditorium, but lunch will be provided on the lawn outside Bridge.

Lunch will be provided, following the talk, on the lawn north of the Bridge Arcade

Attendees joining in person must demonstrate that they comply with Caltech's vaccination requirements (present Caltech ID or AWS ID or vaccination and booster confirmation).